1、Computer Organization&DesignThe Hardware/Software Interface,2024/2/16,1,Reference,Computer Organization&Design国内称为：计算机组成原理国外也称：computer system,computer principle我们用4th Edition可以参考本书英文版第三版第二、三、四版的中文版本计算机组成和设计 硬件/软件接口第2版：出版社：清华大学出版社 第3、4版：出版社：机械工业出版社 传统计算机组成原理教材作者为：白中英，王爱英，唐朔飞等,2024/2/16,2,Evaluation
2、and Grades,Class Participation 10%Labs 20%Homework Assignments 10%Project 20%Final Examinations 40%,2024/2/16,3,2024/2/16,4,Course Objectives,Understand modern computers,their evolution,and trade-offs at the HW/SW interfaceInstruction Set ArchitectureComputer ArithmeticPerformance and MetricsPipelin
3、ingUnderstand the design of a modern computer systemDatapath designControl designMemory System DesignI/O System Design,2024/2/16,5,What you will Learn,How are programs written in high level languages(C or Java)translated into the language of the hardware,and how does hardware execute the resulting p
4、rogram?What is the interface between software and hardware,and how does software instruct hardware to perform needed functions?What determines the performance of a program,and how can software programmers and hardware designers improve performance?,2024/2/16,6,2024/2/16,7,The basic operation of a co
5、mputer:What is a computer?What does it do?How does it work?primitive operations(instructions)arithmetic instruction sequencing and processing memory input/output etc.Understand the relationship between abstractions What is done in hardware?What is done in software?interface design high-level program
6、 to control signals(SW-HW)Software performance depends on understanding underlying HW,What You Will Learn,Chapter 1,Computer Abstractions and Technology,2024/2/16,8,Contents of Chapter 1,1.1 Introduction 1.2 Computer Language and Software System 1.3 Computer Hardware System 1.4 Performance 1.5 Real
7、Stuff:Manufacturing Pentium Chips 1.6 History of Computer Development,2024/2/16,9,ENIAC,Eckert and Mauchly1st working fully electronic computer.1946.18,000 Vacuum tubes.1,800 instructions/sec.3,000 ft3.,Electronic Numerical Integrator And Computer,2024/2/16,10,EDSAC,Maurice Wilkes.1st electronic sto
8、red program computer.650 instructions/sec.1,400 ft3.,EDSAC 1(1949),Electronic Delay Storage Automatic Calculator,2024/2/16,11,Mainframe Era:1950s-1960s,2024/2/16,12,Enabling Tech:ComputersBig Players:“Big Iron”(IBM,UNIVAC)Cost:$1M,Target:BusinessesUsing:COBOL,Fortran,timesharing OS,The mainframe era
9、 IBM 360(1970s),2024/2/16,13,Minicomputer Era:1970s,2024/2/16,14,Enabling Tech:Integrated circuitsBig Players:Digital,HPCost:$10k,Target:Labs&universitiesUsing:C,UNIX OS,PC Era:Mid 1980s-Mid 2000s,2024/2/16,15,Enabling Tech:MicroprocessorsBig Players:Apple,IBMCost:$1k,Target:Consumers(1/person)Using
10、:Basic,Java,Windows OS,Intel 4004,Introduced in 1970.First microprocessor.2,250 transistors.12 mm2.108 kHz.,2024/2/16,16,Intel 8086,29,000 transistors.33 mm2.5 MHz.Introduced in 1979.Basic architecture of the IA32 PC.,2024/2/16,17,Intel 80486,1,200,000 transistors.81 mm2.25 MHz.Introduced in 1989.1s
11、t pipelined implementation of IA32.,2024/2/16,18,Pentium,3,100,000 transistors.296 mm2.60 MHz.Introduced in 1993.1st superscalar implementation of IA32.,2024/2/16,19,Pentium 4,55,000,000 transistors.146 mm2.3 GHz.Introduced in 2000.,2024/2/16,20,Intel Core Duo,291,000,000 transistors.143 mm2(65nm te
12、chnology).3 GHz.Introduced in 2006.,Core 1,Core 2,Cache,2024/2/16,21,UltraSparc T2(Niagara 2),500,000,000 transistors.342 mm265nm.1.21.4 GHz.8 cores.64 threads.1 FPU per core.Introduced in 2007.,1 core,2024/2/16,22,Modern computer systems,2024/2/16,23,Post-PC Era:Late 2000s-?,2024/2/16,24,Enabling T
13、ech:Wireless networking,smartphonesBig Players:Apple,Nokia,Cost:$500,Target:Consumers on the goUsing:Objective C,Android OS,Personal MobileDevices(PMD):,Post-PC Era:Late 2000s-?,2024/2/16,25,Enabling Tech:Local Area Networks,broadband InternetBig Players:Amazon,Google,Target:Transient users or users
14、 who cannot afford high-end equipment,CloudComputing:,Post-PC Era:Late 2000s-?,2024/2/16,26,Datacenters andWarehouse ScaleComputers(WSC):,Enabling Tech:Local Area Networks,cheap serversCost:$200M clusters+maintenance costsTarget:Internet services and PMDs,Advanced RISC Machine(ARM)instruction set in
15、side the iPhone,2024/2/16,27,You will learn how to design and program a related RISC computer:MIPS,iPhone Innards,2024/2/16,28,1 GHz ARM Cortex A8,You will learn about multiple processors,data level parallelism,caches,EECS 370:Introduction to Computer Organization,What next?Many-cores and GPUS,Intel
16、 Polaris:80 cores experimental design.Intel Larrabee:1640 cores(first generation cancelled recently).Nvidia:programmableGPU arrays(hundreds),29,2024/2/16,29,Classes of Computers,Desktop/Notebook ComputersGeneral purpose,variety of softwareSubject to cost/performance tradeoffServer ComputersNetwork b
17、asedHigh capacity,performance,reliabilityRange from small servers to building sizedEmbedded ComputersHidden as components of systemsStringent power/performance/cost constraints,2024/2/16,30,The Processor Market,embedded growth desktop growth,Where else are embedded processors found?,2024/2/16,31,Wha
18、t next?Divergent embedded applications?,Sensing,communication,multimedia,control,2024/2/16,32,Contents of Chapter 1,1.1 Introduction 1.2 Below Your Program 1.3 Under the Covers 1.4 Performance 1.5 The Power Wall 1.6 History of Computer Development,2024/2/16,33,1.2 Below Your Program,Application soft
19、wareWritten in high-level languageSystem softwareCompiler:translates HLL code to machine codeOperating System:service codeHandling input/outputManaging memory and storageScheduling tasks&sharing resourcesHardwareProcessor,memory,I/O controllers,Levels of Program Code,High-level language program(in C
20、)void swap(int v,int k)int temp;temp=vk;vk=vk+1;vk+1=temp;Assembly language program(for MIPS)swap:sll$2,$5,2add$2,$4,$2lw$15,0($2)lw$16,4($2)sw$16,0($2)sw$15,4($2)jr$31Machine(object,binary)code(for MIPS)000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000.,one-to-many,one-to-one,
21、Major Components of a Computer,Processor,Control,Datapath,Memory,Devices,Input,Output,Network,Input Device Inputs Object Code,Processor,Control,Datapath,Memory,000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 100011 00010 01111 0000000000000000 100011 00010 10000 0000000000000100 101011 00010 10000 0000000000000000 101011 00010 01111 0000000000000100 000000 11111 00000 0000000000001000,Devices,Input,Output,Network,Object Code Stored in Memory,
