1、Computer Organization&DesignThe Hardware/Software Interface,2024/2/17,1,2024/2/17,2,2.1 Introduction2.2 Operations of the Computer Hardware2.3 Operands of the Computer Hardware2.4 Signed and Unsigned Numbers2.5 Representing Instructions in the Computer2.6 Logical Operations2.7 Instructions for Makin
2、g Decisions2.8 Supporting Procedures in Computer Hargware2.9 Communicating with People2.10 MIPS Addressing for 32-Bit Immediates and Addresses2.11 Parallelism and Instructions:Synchronization2.12 Translating and Starting a Program2.13 A C Sort Example to Put It All Together2.14 Arrays versus Pointer
3、s,Critical Interface between hardware and softwareAn ISA includes the following Instructions and Instruction Formats格式Data Types,Encodings,and RepresentationsProgrammable Storage:Registers and MemoryAddressing Modes:to address Instructions and DataHandling Exceptional Conditions(like division by zer
4、o)Examples(Versions)First Introduced inIntel(8086,80386,Pentium,.)1978 MIPS(MIPS I,II,III,IV,V)1986PowerPC(601,604,)1993,Instruction Set Architecture(ISA),Instructions,Instructions are the language of the machineWe will study the MIPS instruction set architectureKnown as Reduced Instruction Set Comp
5、uter(RISC)Elegant and relatively simple designSimilar to RISC architectures developed in mid-1980s and 90sVery popular,used in many productsSilicon Graphics,ATI,Cisco,Sony,etc.Comes next in sales after Intel IA-32 processorsAlmost 100 million MIPS processors sold in 2002(and increasing)Alternative d
6、esign:Intel IA-32Known as Complex Instruction Set Computer(CISC),MIPS:Microprocessor without Interlocked Piped Stages无内部互锁流水级的微处理器,2024/2/17,5,Basics of RISC Design,All instructions are typically of one sizeFew instruction formatsArithmetic instructions are register to registerOperands are read from
7、 registersResult is stored in a registerGeneral purpose integer and floating point registersTypically,32 integer and 32 floating-point registersMemory access only via load and store instructionsLoad and store:bytes,half words,words,and double words Few simple addressing modes,Instruction Set,The rep
8、ertoire of instructions of a computerDifferent computers have different instruction setsBut with many aspects in commonEarly computers had very simple instruction setsSimplified implementationMany modern computers also have simple instruction sets,The MIPS Instruction Set,Used as the example through
9、out the courseStanford MIPS commercialized by MIPS Technologies()Large share of embedded core marketApplications in smartphones,tablets,consumer electronics,network/storage equipment,cameras,printers,Logical View of the MIPS Processor,32 General Purpose Registers(GPRs)32-bit registers are used in MI
10、PS32Register 0 is always zeroAny value written to R0 is discardedSpecial-purpose registers LO and HIHold results of integer multiply and divideSpecial-purpose program counter PC32 Floating Point Registers(FPRs)Floating Point registers can be either 32-bit or 64-bitA pair of registers is used for dou
11、ble-precision floating-point,Overview of the MIPS Registers,GPRs$0$31,FPRs$F0$F31,MIPS General-Purpose Registers,32 General Purpose Registers(GPRs)Assembler uses the dollar notation to name registers$0 is register 0,$1 is register 1,and$31 is register 31All registers are 32-bit wide in MIPS32Registe
12、r$0 is always zeroAny value written to$0 is discardedSoftware conventionsSoftware defines names to all registersTo standardize their use in programs$8-$15 are called$t0-$t7Used for temporary values$16-$23 are called$s0-$s7,MIPS Register Conventions,Assembler can refer to registers by name or by numb
13、erIt is easier for you to remember registers by nameAssembler converts register name to its corresponding number,Instruction Formats,All instructions are 32-bit wide,Three instruction formats:Register(R-Type)Register-to-register instructionsOp:operation code specifies the format of the instructionIm
14、mediate(I-Type)16-bit immediate constant is part in the instructionJump(J-Type)Used by jump instructions,R-Type Format,Op:operation code(opcode)Specifies the operation of the instructionAlso specifies the format of the instructionfunct:function code extends the opcodeUp to 26=64 functions can be def
15、ined for the same opcodeMIPS uses opcode 0 to define R-type instructionsThree Register Operands(common to many instructions)Rs,Rt:first and second source operandsRd:destination operandsa:the shift amount used by shift instructions,R-Type Format,Op:operation code(opcode)Specifies the operation of the
16、 instructionAlso specifies the format of the instructionfunct:function code extends the opcodeUp to 26=64 functions can be defined for the same opcodeMIPS uses opcode 0 to define R-type instructionsThree Register Operands(common to many instructions)Rs,Rt:first and second source operandsRd:destination operandsa:the shift amount used by shift instructions,
