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ASTM_F_1530_-_94.pdf

1、Designation:F 1530 94Standard Test Method forMeasuring Flatness,Thickness,and Thickness Variation onSilicon Wafers by Automated Noncontact Scanning1This standard is issued under the fixed designation F 1530;the number immediately following the designation indicates the year oforiginal adoption or,in

2、 the case of revision,the year of last revision.A number in parentheses indicates the year of last reapproval.Asuperscript epsilon(e)indicates an editorial change since the last revision or reapproval.1.Scope1.1 This test method covers a noncontacting,nondestructiveprocedure to determine the thickne

3、ss and flatness of clean,dry,semiconductor wafers in such a way that no physical referenceis required.1.2 This test method is applicable to wafers 50 mm or largerin diameter,and 100 m(0.004 in.)approximately and larger inthickness,independent of thickness variation and surfacefinish,and of wafer sha

4、pe.1.3 This test method measures the flatness of the front wafersurface as it would appear relative to a specified referenceplane when the back surface of the water is ideally flat,as whenpulled down onto an ideally clean,flat chuck.It does notmeasure the free-form shape of the wafer.1.4 Because no

5、chuck is used as a measurement reference,this test method is relatively insensitive to microscopic par-ticles on the back surface of the wafer.1.5 The values stated in SI units are to be regarded as thestandard.The values given in parentheses are for informationonly.1.6 This standard does not purpor

6、t to address all of thesafety concerns,if any,associated with its use.It is theresponsibility of the user of this standard to establish appro-priate safety and health practices and determine the applica-bility of regulatory limitations prior to use.2.Referenced Documents2.1 ASTM Standards:F 1241 Ter

7、minology of Silicon Technology2F 1390 Test Method for Measuring Warp on Silicon Wafersby Automated Noncontact Scanning22.2SEMI Standard:M1 Specifications for Polished Monocrystalline Silicon Wa-fers33.Terminology3.1 Definitions and acronyms related to wafer flatness maybe found in SEMI Specification

8、s M 1.3.2 Other definitions relative to silicon material technologycan be found in Terminology F 1241.4.Summary of Test Method4.1 A calibration procedure is performed.This sets theinstruments scale factor and other constants.4.2 The wafer is supported by a small-area chuck and isscanned along a pres

9、cribed pattern by both members of anopposed pair of probes.4.3 The paired displacement values are used to construct athickness data array(tx,y).This array represents the frontsurface of the wafer when the back surface of the wafer isideally flat,as when pulled down onto and ideally clean,flatchuck(s

10、ee figures in Appendix X1).4.4 The data array is used to produce one or more of theparameters required by the application.4.4.1 If flatness measurements are required,a referenceplane and a focal plane suitable to the application are con-structed on the back or front surface as described in AppendixX

11、2.4.5 Thickness or flatness,or both values are calculated andreported as required.5.Significance and Use5.1 Flatness,thickness and thickness variation are vitalfactors affecting the yield of semiconductor device processing.5.2 Knowledge of these characteristics can help the pro-ducer and consumer de

12、termine if the dimensional characteris-tics of a specimen wafer satisfy given geometrical require-ments.5.3 This test method is suitable for measuring the flatnessand thickness of wafers used in semiconductor device process-ing in the as-sliced,lapped,etched,polished,epitaxial or otherlayer conditio

13、n.1This test method is under the jurisdiction of ASTM Committee F-1 onElectronicsand is the direct responsibility of Subcommittee F01.06 on SiliconMaterials and Process Control.Current edition approved July 15,1994.Published September 1994.2Annual Book of ASTM Standards,Vol 10.05.3Available from Sem

14、iconductor Equipment and Materials International,805East Middlefield Rd.,Mountain View,CA 94043.1Copyright ASTM International,100 Barr Harbor Drive,PO Box C700,West Conshohocken,PA 19428-2959,United States.5.4 Until the results of a planned interlaboratory evaluationof this test method are establish

15、ed,use of this test method forcommercial transactions is not recommended unless the partiesto the test establish the degree of correlation that can beobtained.6.Interferences6.1 Any relative motion between the probes and along theprobe measuring axis during scanning will produce error in thelateral

16、position equivalent-measurement data.6.2 Most equipment systems capable of this measurementhave a definite range of wafer thickness combined withsori/warp(dynamic range)that can be accommodated withoutreadjustment.If the sample moves outside this dynamic rangeduring either calibration or measurement,results may be inerror.An overrange signal can be used to alert the operator andmeasurement data examiners to this event.6.3 The quantity of data points and their spacing may affectthe measurement re

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