1、 IEC/PAS 62326-20 Edition 1.0 2011-01 PUBLICLY AVAILABLE SPECIFICATION PRE-STANDARD Printed boards Part 20:Electronic circuit board for high-brightness LEDs IEC/PAS 62326-20:2011(E)colourinsideCopyrighted material licensed to BR Demo by Thomson Reuters(Scientific),Inc.,downloaded on Nov-28-2014 by J
2、ames Madison.No further reproduction or distribution is permitted.Uncontrolled when printed.THIS PUBLICATION IS COPYRIGHT PROTECTED Copyright 2011 IEC,Geneva,Switzerland All rights reserved.Unless otherwise specified,no part of this publication may be reproduced or utilized in any form or by any mea
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9、tomer Service Centre FAQ or contact us:Email:csciec.ch Tel.:+41 22 919 02 11 Fax:+41 22 919 03 00 Copyrighted material licensed to BR Demo by Thomson Reuters(Scientific),Inc.,downloaded on Nov-28-2014 by James Madison.No further reproduction or distribution is permitted.Uncontrolled when printed.IEC
10、/PAS 62326-20 Edition 1.0 2011-01 PUBLICLY AVAILABLE SPECIFICATION PRE-STANDARD Printed boards Part 20:Electronic circuit board for high-brightness LEDs INTERNATIONAL ELECTROTECHNICAL COMMISSION X ICS 31.180 PRICE CODE ISBN 978-2-88912-345-2 Registered trademark of the International Electrotechnical
11、 Commission colourinsideCopyrighted material licensed to BR Demo by Thomson Reuters(Scientific),Inc.,downloaded on Nov-28-2014 by James Madison.No further reproduction or distribution is permitted.Uncontrolled when printed.2 PAS 62326-20 IEC:2011(E)CONTENTS FOREWORD.6 1 Scope.8 2 Terms and definitio
12、ns.8 3 Classification and class of the ECB.8 4 Design rules and allowance.9 4.1 Panel and board sizes.9 4.1.1 Board size(for reference only).9 4.1.2 Allowance of dimensions.10 4.1.3 Perforation and slit.10 4.1.4 V-cut.11 4.2 Total board thickness.12 4.2.1 Total board thickness and its allowance.12 4
13、.3 Holes.13 4.3.1 Insertion holes and vias.13 4.3.2 Datum hole.15 4.3.3 Assembly hole(a through-hole without wall plating).15 4.4 Conductor.15 4.4.1 Width of conductor pattern and its allowance.15 4.4.2 Distance between conductors and its allowance.16 4.4.3 Distance between conductor and board edge.
14、17 4.4.4 Thickness of the insulating layer.17 4.5 Printed contact.18 4.5.1 Allowance of the distance between the centres of two adjacent printed contacts.18 4.5.2 Allowance of the terminal width of printed contacts.18 4.5.3 Shift of the centre of printed contacts on front and back sides of a board.1
15、8 4.6 Footprint.19 4.6.1 Allowance of the distance between the centers of two pads.19 4.6.2 Allowance of the width of a pad.19 4.6.3 Pad diameter and its allowance for BGA/CSP.20 4.7 Fiducial mark and the mark for component positioning.21 4.8 Interlayer connection.22 5 Quality.22 5.1 Gap between con
16、ductor and the wall of a component insertion hole or a via.22 5.2 Positional deviation between conductor layers of multilayer board.22 5.3 Minimum land width.22 5.4 Surface treatment.24 5.4.1 Gold plating for printed contact.24 5.4.2 Other surface treatment.24 5.5 Defects of solder resist.24 5.6 Symbol mark.26 5.7 Appearance.27 5.7.1 Conductor surface.27 5.7.2 Between conductors.27 6 Performance and test methods.33 Copyrighted material licensed to BR Demo by Thomson Reuters(Scientific),Inc.,