1、Designation:F 1727 97Standard Practice forDetection of Oxidation Induced Defects in Polished SiliconWafers1This standard is issued under the fixed designation F 1727;the number immediately following the designation indicates the year oforiginal adoption or,in the case of revision,the year of last re
2、vision.A number in parentheses indicates the year of last reapproval.Asuperscript epsilon(e)indicates an editorial change since the last revision or reapproval.1.Scope1.1 This practice covers the detection of crystalline defectsin the surface region of silicon wafers.The defects are inducedor enhanc
3、ed by oxidation cycles encountered in normal deviceprocessing.An atmospheric pressure,oxidation cycle represen-tative of bipolar,metal-oxide-silicon(MOS)and CMOS tech-nologies is included.This practice is required to reveal strainfields arising from the presence of precipitates,oxidationinduced stac
4、king faults,and shallow etch pits.Slip is alsorevealed that arises when internal or edge stresses are appliedto the wafer.1.2 Application of this practice is limited to specimens thathave been chemical or chemical/mechanical polished to re-move surface damage from at least one side of the specimen.T
5、his practice may also be applied to detection of defects inepitaxial layers.1.3 The surface of the specimen opposite the surface to beinvestigated may be damaged deliberately or otherwise treatedfor gettering purposes or chemically etched to remove damage.1.4 This standard does not purport to addres
6、s all of thesafety concerns,if any,associated with its use.It is theresponsibility of the user of this standard to establish appro-priate safety and health practices and determine the applica-bility of regulatory limitations prior to use.2.Referenced Documents2.1 ASTM Standards:D 5127 Guide for Elec
7、tronic Grade Water2F 1241 Terminology of Silicon Technology3F 1725 Guide forAnalysis of Crystallographic Perfection ofSilicon Ingots3F 1726 Guide forAnalysis of Crystallographic Perfection ofSilicon Wafers3F 1809 Guide for Selection and Use of Etching Solutions toDelineate Structural Defects in Sili
8、con3F 1810 Test Method for Counting Preferentially Etched orDecorated Surface Defects in Silicon Wafers32.2SEMI Specifications:4SEMI C-1 Specification for ReagentsSEMI C-3 Specifications for Gases3.Terminology3.1 Defect-related terminology may be found in Terminol-ogy F 1241.4.Summary of Practice4.1
9、 Wet oxidation is used to generate or highlight defects,orboth,in silicon wafers.This oxidation may also simulatesimple device production processes.The defects are revealedsubsequently by preferential etching and examination by inter-ference contrast microscopy according to referenced ASTMstandards.
10、5.Significance and Use5.1 Defects induced by thermal processing of silicon wafersmay adversely influence device performance and yield.5.2 These defects are influenced directly by contamination,ambient atmosphere,temperature,time at temperature,and rateof change of temperature to which the specimens
11、are subjected.Conditions vary significantly among device manufacturingtechnologies.The thermal cycling procedures of this practiceare intended to simulate basic device processing technologies.Oxidation cycles other than specified herein,or multipleoxidation cycles,may sometimes more accurately simul
12、atedevice processing procedures.The results obtained may differsignificantly from those obtained with the specified oxidationcycles.5.3 The geometry of some patterns revealed by this practicesuggests that they are related to the crystal growth processwhile others seem related to surface preparation
13、or thermalcycling conditions.5.4 This practice is suitable for acceptance testing whenused with referenced practices and methods.6.Interferences6.1 Material having residual work damage in the polishedsurface exhibits visible patterns when the procedures of thispractice are used.Usually,edge damage,l
14、apping damage,tool1This practice is under the jurisdiction of ASTM Committee F-1 on Electronicsand is the direct responsibility of Subcommittee F01.06 on Silicon Materials andProcess Control.Current edition approved June 10,1997.Published August,1997.2Annual Book of ASTM Standards,Vol 11.01.3Annual
15、Book of ASTM Standards,Vol 10.05.4Available from Semiconductor Equipment and Materials International,805 EMiddlefield Rd.,Mountain View,CA 94043.1AMERICAN SOCIETY FOR TESTING AND MATERIALS100 Barr Harbor Dr.,West Conshohocken,PA 19428Reprinted from the Annual Book of ASTM Standards.Copyright ASTMmar
16、ks,or scratches are easily identified by the location andpattern observed.6.2 Contamination not removed by preparatory cleaningprocedures or deposited following cleaning,may becomevisible after oxidation and preferential etching.6.3 Slip may be introduced by differential expansion at thepoints of wafer support in the furnace boat.Slip radiating fromthe points of support may be assumed to originate from thisboat pinch and not be inherent in the unprocessed wafer.Slipmay also be caused by large th
