1、 IEC PA S 62878-2-5 Edition 1.0 2015-08 PUBLICLY A V A ILA BLE SPECIFICA TION PRE-STANDARD Dev ice embedded substrate Guidelines Data format IEC PA S 62878-2-5:2015-08(en)colourinsideCopyright International Electrotechnical Commission THIS PUBLICA TION IS COPYRIGHT PROTECTED Copyright 2015 IEC,Genev
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11、 V A ILA BLE SPECIFICA TION PR E-STA NDA RD Dev ice embedded substrate Guidelines Data format INTERNATIONAL ELECTROTECHNICAL COMMISSION ICS 31.180;31.190 ISBN 978-2-8322-2808-1 R egist er ed tr ademar k of t he Int er national Electr ot echnical Commission Warning!Make sure that you obtained this pu
12、blication from an authorized distributor.colourinsideCopyright International Electrotechnical Commission 2 IEC PAS 62878-2-5:2015 IEC 2015 CONTENTS FOREWORD.4 1 Scope.6 1.1 Purpose.7 1.2 Applicable range.7 1.2.1 Product.7 1.2.2 Process.8 1.3 Features.9 1.3.1 Maintenance of the device embedded substr
13、ate structure.9 1.3.2 Maintenance of SiP interposer structure.10 1.3.3 Maintenance of design data with a virtual layer of terminal positions of embedded device(s).10 1.3.4 Maintenance of terminal structure and embedded device structure including SiP.11 1.3.5 Seamless ownership of design data.11 2 Fi
14、le description.12 2.1 File description summary.12 2.1.1 Types of data and their structure.12 2.1.2 File structure.14 2.2 3D expression.15 2.2.1 Coordinates.15 2.2.2 Position description.16 2.2.3 Relation between coordinate origin and board position.16 2.3 Layer concept.17 2.4 Substrate data.17 2.4.1
15、 Layer map information.18 2.4.2 Device arrangement information.19 2.4.3 Basic figures.21 2.4.4 Net information.28 2.4.5 Artwork information.29 2.4.6 Package information.29 2.4.7 External port information.29 2.4.8 Internal port information.29 2.4.9 User expansion information.29 2.5 Defined data.29 2.
16、5.1 Layer definition.30 2.5.2 Land definition.30 2.5.3 Via definition.31 2.5.4 Device definition.32 2.5.5 User expansion definition.33 3 Terminology.34 4 Commentary Additional information.36 Figure 1.1 Flow chart of design of device embedded substrate.7 Figure 1.2 General concept of product.8 Figure 1.3 Example of a structure of a device embedded substrate.10 Figure 1.4 Examples of a structure of a SiP interposer.10 Copyright International Electrotechnical Commission IEC PAS 62878-2-5:2015 IEC 2
