1、 IEC/TR 62240-1 Edition 1.0 2013-04 TECHNICAL REPORT Process management for avionics Electronic components capability in operation Part 1:Temperature uprating IEC/TR 62240-1:2013(E)colourinsideCopyrighted material licensed to BR Demo by Thomson Reuters(Scientific),Inc.,downloaded on Nov-27-2014 by J
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10、2013-04 TECHNICAL REPORT Process management for avionics Electronic components capability in operation Part 1:Temperature uprating INTERNATIONAL ELECTROTECHNICAL COMMISSION XA ICS 03.100.50;31.020;49.060 PRICE CODE ISBN 978-2-83220-739-0 Registered trademark of the International Electrotechnical Com
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12、ed.2 TR 62240-1 IEC:2013(E)CONTENTS FOREWORD.4 INTRODUCTION.6 1 Scope.7 2 Normative references.7 3 Terms,definitions and abbreviations.7 3.1 Terms and definitions.7 3.2 Abbreviations.10 4 Selection provisions.10 4.1 General.10 4.2 Device selection,usage and alternatives.10 4.2.1 General.10 4.2.2 Alt
13、ernatives.11 4.2.3 Device technology.11 4.2.4 Compliance with the electronic component management plan.11 4.3 Device capability assessment.12 4.3.1 General.12 4.3.2 Device package and internal construction capability assessment.12 4.3.3 Risk assessment(assembly level).12 4.3.4 Device uprating method
14、s.13 4.3.5 Device reliability assurance.14 4.4 Device quality assurance in wider temperature ranges.15 4.4.1 General.15 4.4.2 Device parameter re-characterisation testing.15 4.4.3 Device parameter conformance testing.15 4.4.4 Higher assembly level testing.15 4.4.5 Semiconductor device change monitor
15、ing.16 4.4.6 Failure data collection and analysis.16 4.5 Documentation.16 4.6 Device identification.16 Annex A(informative)Device parameter re-characterisation.20 Annex B(informative)Stress balancing.32 Annex C(informative)Parameter conformance assessment.42 Annex D(informative)Higher assembly level
16、 testing.49 Bibliography.52 Figure 1 Flow chart for semiconductor devices in wider temperature ranges.18 Figure 2 Report form for documenting device usage in wider temperature ranges.19 Figure A.1 Parameter re-characterisation.21 Figure A.2 Flow diagram of parameter re-characterisation capability assurance process.23 Figure A.3 Margin in electrical parameter measurement based on the results of the sample test.26 Figure A.4 Schematic diagram of parameter limit modifications.27 Figure A.5 Param
