1、 IEC/PAS 62326-14Edition 1.0 2010-09PUBLICLY AVAILABLE SPECIFICATIONPRE-STANDARD Printed boards Part 14:Device embedded substrate Terminology/reliability/design guide IEC/PAS 62326-14:2010(E)colourinsideCopyrighted material licensed to BR Demo by Thomson Reuters(Scientific),Inc.,downloaded on Nov-28
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9、 visit the Customer Service Centre FAQ or contact us:Email:csciec.ch Tel.:+41 22 919 02 11 Fax:+41 22 919 03 00 Copyrighted material licensed to BR Demo by Thomson Reuters(Scientific),Inc.,downloaded on Nov-28-2014 by James Madison.No further reproduction or distribution is permitted.Uncontrolled wh
10、en printed.IEC/PAS 62326-14Edition 1.0 2010-09PUBLICLY AVAILABLE SPECIFICATIONPRE-STANDARD Printed boards Part 14:Device embedded substrate Terminology/reliability/design guide INTERNATIONAL ELECTROTECHNICAL COMMISSION XBICS 31.180 PRICE CODEISBN 978-2-88912-180-9 Registered trademark of the Interna
11、tional Electrotechnical Commission colourinsideCopyrighted material licensed to BR Demo by Thomson Reuters(Scientific),Inc.,downloaded on Nov-28-2014 by James Madison.No further reproduction or distribution is permitted.Uncontrolled when printed.2 PAS 62326-14 IEC:2010(E)CONTENTS FOREWORD.6 1 Scope.
12、8 2 Normative references.8 3 General definitions.9 3.1 Technology of the device embedded substrate.9 3.2 Substrate.12 3.3 Jisso mounting and interconnection.13 3.4 Structure and terminology.15 3.4.1 General.15 3.4.2 Device embedding by conventional process.17 3.4.3 Electrical connection by vias afte
13、r device embedding.19 3.4.4 Embedding of various devices over multiple layers.20 4 Test methods.22 4.1 General.22 4.2 Structure of TEG(Test Equipment Group Test vehicle).22 4.3 Test circuit.24 4.4 Test specimen(TEG)and example of test substrate.26 5 Test items and test equipment.27 5.1 General.27 5.
14、2 Test for resistance of conductor.28 5.3 Resistance to over current.29 5.4 Withstand voltage.30 5.5 Insulation resistance.30 5.6 Peeling strength of conductor.32 5.7 Pull-off strength of plated through hole.32 5.8 Adhesivity of plated film.32 5.9 Solderability.33 5.10 Thermal shock(vapour phase col
15、d heat cycle).34 5.11 Thermal shock(high temperature).35 5.12 Flammability.36 5.13 Bow and twist.36 5.14 Migration.37 6 Indication,packaging and storage.37 7 Design guide.38 7.1 General.38 7.2 Structure of device embedded substrate.38 7.2.1 General.38 7.2.2 Specification of the front and back surfac
16、es of a device embedded substrate.38 7.2.3 Definition of layers of a device embedded substrate.40 7.2.4 Definitions of insulation layer thickness,conductor spacing and distance between electrode and conductor spacing(hereafter called“electrode”)at a terminal.44 7.3 Conditions for base.47 7.4 Conditions for embedding devices.48 Copyrighted material licensed to BR Demo by Thomson Reuters(Scientific),Inc.,downloaded on Nov-28-2014 by James Madison.No further reproduction or distribution is perm