1、Designation:F 928 93(Reapproved 1999)Standard Test Methods forEdge Contour of Circular Semiconductor Wafers and RigidDisk Substrates1This standard is issued under the fixed designation F 928;the number immediately following the designation indicates the year oforiginal adoption or,in the case of rev
2、ision,the year of last revision.A number in parentheses indicates the year of last reapproval.Asuperscript epsilon(e)indicates an editorial change since the last revision or reapproval.1.Scope1.1 These test methods2provide means for examining theedge contour of circular wafers of silicon,gallium ars
3、enide,and other electronic materials,and determining fit to limits ofcontour specified by a template that defines a permitted zonethrough which the contour must pass.Principal application ofsuch a template is intended for,but not limited to,wafers thathave been deliberately edge shaped.1.2 Two test
4、methods are described.One is destructive andis limited to inspection of discrete points on the periphery,including flats.The contour of deliberately edge-shaped wafersmay not be uniform around the entire periphery,and thus thediscrete location(s)may or may not be representative of theentire peripher
5、y.The other test method is nondestructive andsuitable for inspection of all points on the wafers peripheryexcept flats.1.3 The nondestructive test method may also be applied tothe examination of the edge contour of the outer periphery ofsubstrates for rigid disks used for magnetic storage of data.NO
6、TE1Reference to wafers in the remainder of this standard shall beinterpreted to include substrates for rigid disks unless the phrase“ofelectronic materials”is also included in the context.1.4 The values stated in SI units are to be regarded as thestandard.The values given in parentheses are for info
7、rmationonly.1.5 This standard does not purport to address all of thesafety concerns,if any,associated with its use.It is theresponsibility of the user of this standard to establish appro-priate safety and health practices and determine the applica-bility of regulatory limitations prior to use.2.Refe
8、renced Documents2.1 ASTM Standards:E 122 Practice for Choice of Sample Size to Estimate aMeasure of Quality for a Lot or Process32.2Military Standard:MIL-STD-105D Sampling Procedures and Tables for In-spection by Attributes42.3SEMI Standards:SEMI M1,Specifications for Polished Monocrystalline Sili-c
9、on Wafers5SEMI M9,Specifications for Polished MonocrystallineGallium Arsenide Slices53.Summary of Test Methods3.1 Both test methods employ optical means to project ashadow of the edge contour at substantial magnification on ascreen.In applying Method A(destructive)the sample wafer iscleaved or broke
10、n along a diameter.Asharply focused image ofthe cross section of the wafer is obtained over a sufficientlylarge region near the edge with the aid of an optical comparatoror projection microscope.In Method B(nondestructive)theunbroken wafer is back lighted with collimated(parallel)lightsuch that a sh
11、arply defined shadow of the wafer edge isprojected on a screen.In this test method the wafer is notaltered in any way.3.2 By either test method,the contour of the wafer edgeprofile image is compared to a template that has been mountedor projected on the screen.The template defines a permittedzone th
12、rough which the edge contour must pass.4.Significance and Use4.1 The edges of circular wafers of electronic materials arefrequently required to be shaped after cutting the wafers fromthe ingot.Contouring the wafer edge reduces the incidence ofchipping and minimizes epitaxial edge crown and photoresi
13、stedge bead during subsequent processing of the wafer.Simi-larly,edges of rigid disk substrates are frequently edge shaped.4.2 The test methods described here provide means todetermine that the wafer edge contour is appropriate to meetspecifications,such as SEMI M1 or SEMI M9,which areintended to pr
14、ovide wafers avoiding the difficulties enumeratedabove.1These test methods are under the jurisdiction of ASTM Committee F-1 onElectronics and are the direct responsibility of Subcommittee F01.06 on SiliconMaterials and Process Control.Current edition approved Aug.15,1993.Published October 1993.Origi
15、nallypublished as F 928 85.Last previous edition F 928 92.2DIN 50441/2 is equivalent to Method B of this standard.It is the responsibilityof DIN Committee NMP 221 with which Committee F-1 maintains close technicalliaison.DIN 50441/2,Measurement of the Geometric Dimensions of SemiconductorSlices;Test
16、ing of Edge Rounding,is available from Beuth Verlag GmbH,Burg-grafenstrasse 4-10,D-1000 Berlin 30,FRG.3Annual Book of ASTM Standards,Vol 14.02.4Available from Standardization Documents Order Desk,Bldg.4 Section D,700Robbins Ave.,Philadelphia,PA 19111-5094,Attn:NPODS.5Available from the Semiconductor Equipment and Materials International,805East Middlefield Road,Mountain View,CA 94043.1Copyright ASTM,100 Barr Harbor Drive,West Conshohocken,PA 19428-2959,United States.4.3 Method A is recommended f
